quartus ii 安装在WIN7时一定要安装在C盘吗？_百度知道
quartus ii 安装在WIN7时一定要安装在C盘吗？
把quartus ii7.2安装在D盘，是这样吗。网上看到有人说要安在C盘才可以，把软件改成WIN7兼容后也没有用，发现写程序时单引号无法输入了
提问者采纳
只是默认安装C盘 可以改到其他盘的！我电脑装的就是双系统 WINXP和WIN7
如果我把它用XP虚拟机安装之后能正常运行吗？
没用过虚拟机 不清楚 不过你可以试试
提问者评价
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其他3条回答
不是啊，我就装在D盘啊，你破解成功没
应该不是这个问题
那是什么问题呢？只有单引号无法输入，其他的都可以。我安装的是学校提供的已经破解好的软件
嗯看你自己
等待您来回答
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出门在外也不愁Win7下Quartus 11安装ByteBlaster II驱动的方法-电子产品世界论坛
Win7下Quartus 11安装ByteBlaster II驱动的方法
这是参考Altera官方的一个声明，链接，在Win7下测试正常。
Driver Installation
From the Start menu, choose Run.
In the Open field, type cmd and then click OK. The command prompt window appears.
To install the Altera ByteBlaster driver with the BBLPT utility, type the following command at the command prompt:
&Quartus II Installation Path&\bin\bblpt /i &
When the ByteBlaster Device Driver Installation window appears, click OK.
You may now connect the Altera ByteBlaster download cable to the PC. Complete the installation by setting up programming hardware:
To remove the Altera ByteBlaster driver with the BBLPT utility, type the following command at the command prompt:
&Quartus II Installation Path&\bin\bblpt /r &
When the ByteBlaster Device Driver Installation window appears, click OK.
关键词：&&&&&&&&&&&&&&&&
什么东东~~~~
能找到的信息，不容易啊~~
不错，不过，一些软件在win7下可能没有XP下用得顺畅
是啊，为了在win7上把要用的软件环境建立起来，真是不容易啊。
软件要用最新版的才行，驱动要用各种迂回方式安装。有些老的软件直接不能用。
哈哈，个人感觉win7用起来比win xp更方便，尤其是win7的文件管理，非常人性化。
win7 能跑Q II 10.0呀，不用装啥驱动的。。。另外，11有哪些改进的地方呢？改动好的话就果断跟进升级了
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win7 64位下安装 quartus 11.1 or 12.1 无法用modelsim产生Nios核仿真文件？
马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。
才可以下载或查看，没有帐号？
win7 64位下安装 quartus 11.1 or 12.1 无法用modelsim产生Nios核仿真文件？
quartus 11.1 sp2 64位
modelsim 10.0c
quartus 12.1 sp1 64位
modelsim-ae 10.1b
quartus 11.1 sp2 32位
modelsim 10.0c
quartus 12.1 sp1 32位
modelsim-ae 10.1b
quartus 11.1 sp1 32位
modelsim-ae 10.0c
按照黑金&&NIOSII那些事儿-Qsys_EP4CE15&&第一章 hello world 生成的 nios 核 运行没问题
现在在Qsys生成软核，加上仿真输出
Create testbench Qsys system: Standard,BFMs for standard Avlon interfaces
Create testbench simulation model:Verilog
环境1,2,3,4出错
Error: nios2: can't read &plainTEXTfound&: no such variable
& & while executing
&return $plainTEXTfound&
& & (procedure &sub_generate_create_processor_rtl& line 112)
& & invoked from within
&sub_generate_create_processor_rtl& && && &&&&$output_name& &$output_directory& &$rtl_ext& &$simgen&&
& & invoked from within
&set plainTEXTfound [sub_generate_create_processor_rtl& && && &&&&$output_name& &$output_directory& &$rtl_ext& &$simgen&]&
& & (procedure &generate& line 3)
& & invoked from within
&generate& && && && && & &$NAME& &$output_directory& &$rtl_ext& &$simgen&&
& & invoked from within
&set plainTEXTfound [generate& && && && && & &$NAME& &$output_directory& &$rtl_ext& &$simgen&]&
& & (procedure &generate_with_plaintext& line 5)
& & invoked from within
&generate_with_plaintext &$NAME& &$rtl_ext& &$simgen&&
& & (procedure &sub_sim_verilog& line 5)
& & invoked from within
&sub_sim_verilog TestHJ_CPU_nios2&
环境5没问题！
有什么办法解决吗？是哪里破解不对吗？
难道只能用回WIN7 32位？
ModelSim-Altera Edition software
ModelSim-Altera Starter Edition software
32 bit support only
与这有关吗？
但是其它不用到IP核的仿真都很好，
用到IP核时，就生成不了带仿真的软核？
而在WIN7 32位系统中，用到IP核，也可以生成带仿真的软核。
& & 我曾经在WIN7 64位旗舰SP1，Q2的64位12.1SP1用modelsim SE 10.1C 64位进行过LED的仿真测试，正常通过。
回复&&zglak
& & 我曾经在WIN7 64位旗舰SP1，Q2的64位12.1SP1用modelsim SE 10.1C 64位进行过LED的仿 ...
rabbitpan0317 发表于
& & 谢谢你！我试下。
modelsim SE 是不是不需要注册啊？
回复&&zglak
& & 我曾经在WIN7 64位旗舰SP1，Q2的64位12.1SP1用modelsim SE 10.1C 64位进行过LED的仿 ...
rabbitpan0317 发表于
& & 我刚刚下载了ASE，安装了一试，还是一样不行啊？奇怪了……
回复&&zglak
& & 我曾经在WIN7 64位旗舰SP1，Q2的64位12.1SP1用modelsim SE 10.1C 64位进行过LED的仿 ...
rabbitpan0317 发表于
& & 又安装了SE还是一样……看样子是不是我的系统有问题，我再试试。
& & 最近的事有些忙不过来了。还不行留个QQ吧，我争取周末联系你。
回复&&zglak
& & 最近的事有些忙不过来了。还不行留个QQ吧，我争取周末联系你。
rabbitpan0317 发表于
& & 谢谢你！我又重装安装了纯净Win7x64系统，还是不行……
周未晚上好不？远程控制看看：）
& &&&qq联系不上，你的报错信息不完全，感觉上是你的和谐没有和谐好造成的。64位和谐要将32位和64位都和谐一遍才OK。因为altera 64位软件只是在32位上做了个大补丁，很多东东还和32位的有关联。
回复&&zglak
& &&&qq联系不上，你的报错信息不完全，感觉上是你的和谐没有和谐好造成的。64位和谐要将 ...
rabbitpan0317 发表于
& & 不好意思，昨晚公司加班去了。我把32，64都和谐了啊，还是不行。那什么时候有时间提前留个言好不？帮我远程控制看看：）
& &再补上我的报错信息。
Info: nios2: Info: Command: quartus_map kernel_nios2 --simgen --ini=disable_check_quartus_compatibility_qsys_only=on --simgen_arbitrary_blackbox=+kernel_nios2_test_+kernel_nios2_mult_+kernel_nios2_jtag_debug_module_+kernel_nios2_oci_test_+kernel_nios2_jtag_debug_module_+kernel_nios2_jtag_debug_module_tck --simgen_parameter=CBX_HDL_LANGUAGE=verilog,SIMGEN_RAND_POWERUP_FFS=OFF,simgen_initialization_file=simgen_init.txt
Info: nios2: Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_test_bench.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_test_bench
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_mult_cell.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_mult_cell
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_wrapper.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_wrapper
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_oci_test_bench.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_oci_test_bench
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_sysclk.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_sysclk
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_tck.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_tck
Info: nios2: Warning (292000): FLEXlm software error: Invalid (inconsistent) license key.&&The license key and data for the feature do not match.&&This usually happens when a license file has been altered. Feature:& && & 6AF7_00A2 License path:&&G:\License\Altera_license_121_64. FLEXnet Licensing error:-8,523 For further information, refer to the FLEXnet Licensing documentation, available at &&.
Info: nios2: Warning (292000): FLEXlm software error: Invalid (inconsistent) license key.&&The license key and data for the feature do not match.&&This usually happens when a license file has been altered. Feature:& && & 6AF7_00A2 License path:&&G:\License\Altera_license_121_64. FLEXnet Licensing error:-8,523 For further information, refer to the FLEXnet Licensing documentation, available at &&.
Info: nios2: Error (10003): Can't open encrypted VHDL or Verilog HDL file &C:/Users/ZGL/AppData/Local/Temp/alt.dir/0023_nios2_gen/simgen_tmp_0/kernel_nios2.v& -- current license file does not contain a valid license for encrypted file
Info: nios2: Info (12021): Found 0 design units, including 0 entities, in source file kernel_nios2.v
Info: nios2: Error: Quartus II 32-bit Analysis & Synthesis was unsuccessful. 1 error, 2 warnings
Info: nios2:& &&&Error: Peak virtual memory: 335 megabytes
Info: nios2:& &&&Error: Processing ended: Mon Mar 25 22:36:45 2013
Info: nios2:& &&&Error: Elapsed time: 00:00:02
Info: nios2:& &&&Error: Total CPU time (on all processors): 00:00:02
Info: nios2: #
22:36:46 (*)& &&C:/altera/12.1sp1/quartus/bin/quartus_map& kernel_nios2 --simgen --ini=disable_check_quartus_compatibility_qsys_only=on --simgen_arbitrary_blackbox=&+kernel_nios2_test_+kernel_nios2_mult_+kernel_nios2_jtag_debug_module_+kernel_nios2_oci_test_+kernel_nios2_jtag_debug_module_+kernel_nios2_jtag_debug_module_tck& --simgen_parameter=CBX_HDL_LANGUAGE=verilog,SIMGEN_RAND_POWERUP_FFS=OFF,simgen_initialization_file=simgen_init.txt command returned 3
Info: nios2: child process exited abnormally
Error: nios2: Failed to generate module kernel_nios2
Info: nios2: Done RTL generation for module 'kernel_nios2'
Error: nios2: can't read &plainTEXTfound&: no such variable
& & while executing
&return $plainTEXTfound&
& & (procedure &sub_generate_create_processor_rtl& line 112)
& & invoked from within
&sub_generate_create_processor_rtl& && && &&&&$output_name& &$output_directory& &$rtl_ext& &$simgen&&
& & invoked from within
&set plainTEXTfound [sub_generate_create_processor_rtl& && && &&&&$output_name& &$output_directory& &$rtl_ext& &$simgen&]&
& & (procedure &generate& line 3)
& & invoked from within
&generate& && && && && & &$NAME& &$output_directory& &$rtl_ext& &$simgen&&
& & invoked from within
&set plainTEXTfound [generate& && && && && & &$NAME& &$output_directory& &$rtl_ext& &$simgen&]&
& & (procedure &generate_with_plaintext& line 5)
& & invoked from within
&generate_with_plaintext &$NAME& &$rtl_ext& &$simgen&&
& & (procedure &sub_sim_verilog& line 5)
& & invoked from within
&sub_sim_verilog kernel_nios2&
Info: nios2: &kernel_inst& instantiated altera_nios2_qsys &nios2&
Error: Generation stopped, 39 or more modules remaining
Info: kernel_tb: Done kernel_tb& with 27 modules, 5 files, 218330 bytes
Error: ip-generate failed with exit code 1: 3 Errors, 0 Warnings
Error: There were errors creating the testbench system.
Info: Finished: Create testbench Qsys system
Info: nios2: Info: Command: quartus_map kernel_nios2 --simgen --ini=disable_check_quartus_compatibility_qsys_only=on --simgen_arbitrary_blackbox=+kernel_nios2_test_+kernel_nios2_mult_+kernel_nios2_jtag_debug_module_+kernel_nios2_oci_test_+kernel_nios2_jtag_debug_module_+kernel_nios2_jtag_debug_module_tck --simgen_parameter=CBX_HDL_LANGUAGE=verilog,SIMGEN_RAND_POWERUP_FFS=OFF,simgen_initialization_file=simgen_init.txt
Info: nios2: Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_test_bench.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_test_bench
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_mult_cell.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_mult_cell
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_wrapper.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_wrapper
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_oci_test_bench.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_oci_test_bench
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_sysclk.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_sysclk
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_tck.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_tck
Info: nios2: Warning (292000): FLEXlm software error: Invalid (inconsistent) license key.&&The license key and data for the feature do not match.&&This usually happens when a license file has been altered. Feature:& && & 6AF7_00A2 License path:&&G:\License\Altera_license_121_64. FLEXnet Licensing error:-8,523 For further information, refer to the FLEXnet Licensing documentation, available at &&.
Info: nios2: Warning (292000): FLEXlm software error: Invalid (inconsistent) license key.&&The license key and data for the feature do not match.&&This usually happens when a license file has been altered. Feature:& && & 6AF7_00A2 License path:&&G:\License\Altera_license_121_64. FLEXnet Licensing error:-8,523 For further information, refer to the FLEXnet Licensing documentation, available at &&.
Info: nios2: Error (10003): Can't open encrypted VHDL or Verilog HDL file &C:/Users/ZGL/AppData/Local/Temp/alt.dir/0023_nios2_gen/simgen_tmp_0/kernel_nios2.v& -- current license file does not contain a valid license for encrypted file
Info: nios2: Info (12021): Found 0 design units, including 0 entities, in source file kernel_nios2.v
Info: nios2: Error: Quartus II 32-bit Analysis & Synthesis was unsuccessful. 1 error, 2 warnings
Info: nios2:& &&&Error: Peak virtual memory: 335 megabytes
Info: nios2:& &&&Error: Processing ended: Mon Mar 25 22:36:45 2013
Info: nios2:& &&&Error: Elapsed time: 00:00:02
Info: nios2:& &&&Error: Total CPU time (on all processors): 00:00:02
Info: nios2: #
22:36:46 (*)& &&C:/altera/12.1sp1/quartus/bin/quartus_map& kernel_nios2 --simgen --ini=disable_check_quartus_compatibility_qsys_only=on --simgen_arbitrary_blackbox=&+kernel_nios2_test_+kernel_nios2_mult_+kernel_nios2_jtag_debug_module_+kernel_nios2_oci_test_+kernel_nios2_jtag_debug_module_+kernel_nios2_jtag_debug_module_tck& --simgen_parameter=CBX_HDL_LANGUAGE=verilog,SIMGEN_RAND_POWERUP_FFS=OFF,simgen_initialization_file=simgen_init.txt command returned 3
Info: nios2: child process exited abnormally
Error: nios2: Failed to generate module kernel_nios2
Info: nios2: Done RTL generation for module 'kernel_nios2'
Error: nios2: can't read &plainTEXTfound&: no such variable
& & while executing
&return $plainTEXTfound&
& & (procedure &sub_generate_create_processor_rtl& line 112)
& & invoked from within
&sub_generate_create_processor_rtl& && && &&&&$output_name& &$output_directory& &$rtl_ext& &$simgen&&
& & invoked from within
&set plainTEXTfound [sub_generate_create_processor_rtl& && && &&&&$output_name& &$output_directory& &$rtl_ext& &$simgen&]&
& & (procedure &generate& line 3)
& & invoked from within
&generate& && && && && & &$NAME& &$output_directory& &$rtl_ext& &$simgen&&
& & invoked from within
&set plainTEXTfound [generate& && && && && & &$NAME& &$output_directory& &$rtl_ext& &$simgen&]&
& & (procedure &generate_with_plaintext& line 5)
& & invoked from within
&generate_with_plaintext &$NAME& &$rtl_ext& &$simgen&&
& & (procedure &sub_sim_verilog& line 5)
& & invoked from within
&sub_sim_verilog kernel_nios2&
Info: nios2: &kernel_inst& instantiated altera_nios2_qsys &nios2&
Error: Generation stopped, 39 or more modules remaining
Info: kernel_tb: Done kernel_tb& with 27 modules, 5 files, 218330 bytes
Error: ip-generate failed with exit code 1: 3 Errors, 0 Warnings
Error: There were errors creating the testbench system.
Info: Finished: Create testbench Qsys system
Kyle&&22:53:34
Info: nios2: Info: Command: quartus_map kernel_nios2 --simgen --ini=disable_check_quartus_compatibility_qsys_only=on --simgen_arbitrary_blackbox=+kernel_nios2_test_+kernel_nios2_mult_+kernel_nios2_jtag_debug_module_+kernel_nios2_oci_test_+kernel_nios2_jtag_debug_module_+kernel_nios2_jtag_debug_module_tck --simgen_parameter=CBX_HDL_LANGUAGE=verilog,SIMGEN_RAND_POWERUP_FFS=OFF,simgen_initialization_file=simgen_init.txt
Info: nios2: Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_test_bench.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_test_bench
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_mult_cell.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_mult_cell
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_wrapper.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_wrapper
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_oci_test_bench.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_oci_test_bench
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_sysclk.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_sysclk
Info: nios2: Info (12021): Found 1 design units, including 1 entities, in source file kernel_nios2_jtag_debug_module_tck.v
Info: nios2:& &&&Info (12023): Found entity 1: kernel_nios2_jtag_debug_module_tck
Info: nios2: Warning (292000): FLEXlm software error: Invalid (inconsistent) license key.&&The license key and data for the feature do not match.&&This usually happens when a license file has been altered. Feature:& && & 6AF7_00A2 License path:&&G:\License\Altera_license_121_64. FLEXnet Licensing error:-8,523 For further information, refer to the FLEXnet Licensing documentation, available at &&.
Info: nios2: Warning (292000): FLEXlm software error: Invalid (inconsistent) license key.&&The license key and data for the feature do not match.&&This usually happens when a license file has been altered. Feature:& && & 6AF7_00A2 License path:&&G:\License\Altera_license_121_64. FLEXnet Licensing error:-8,523 For further information, refer to the FLEXnet Licensing documentation, available at &&.
本帖最后由 zglak 于
20:13 编辑
回复&&zglak
& &&&qq联系不上，你的报错信息不完全，感觉上是你的和谐没有和谐好造成的。64位和谐要将 ...
rabbitpan0317 发表于
& & 谢谢版主帮助，问题终于解决好了，真是和谐问题啊！
我也遇到相同的问题了，楼主是怎么解决的
Powered bywin7下使用Quartus II_百度知道
win7下使用Quartus II
quartus/quartus软件&#47.1 Build 350 03/quartus/quartus/study/2010 SJ Web EditionService Pack Ie;init/24&#47.pkg_info-------------------------------------couldn'internal/quartus/init&#47: Sub-;quartus/tcl/毕业设计&#47: /internal/tcl&#47:common/atcl_root, Line.cpp, Fatcl&#47我装了的是Quartus II 9;ccl&#47: ATCL,弹出的错误是Internal Equartus&#47: no such file or directoryQuartus II Version 9:/毕业设计/common/study&#47: 975-------------------------------------Error found while sourcing.pkg_info&quartus/quartus软件/t read file &quot:&#47.1sp2 Web Edition
提问者采纳
Quartus II是不完全支持WIN7的哦你可以去Altera官网去看看，它只写明了支持XP ,VISTA
提问者评价
支持vista的话必然支持win7，解决办法我已经找到，就是把Quartus装在C盘就行了，不过还是很感觉你的回答
其他类似问题
quartus的相关知识
其他2条回答
路径不能存在中文，这个错误是出路径中有中文了！
亲，文件路径不能有汉字。
等待您来回答
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